本論文研究目的在利用時域反射儀量測並配合最小平方法來最佳化互連元件之等效電路模型。探討高速數位系統中步階上升源的效應及如何利用時域反射儀來做量測；接著由兩種積分公式逐步推導萃取互連元件等效電感及電容值的方法，藉以計算實際待測物之互連元件參數，同時可以利用特性阻抗及相關公式建立待測物的等效電路模型。論文最後以量測各種互連元件為目標，特別著重於低溫共燒陶瓷之螺旋電感器，並以Tektronix IPA510及PSpice模擬軟體對實際元件的分析結果，來確認所發展方法之正確性。

Equivalent model extracting by the least-square estimation method and optimation in time domain measurement.It discuss at the effect of step soure rising and how to use TDR measurements in high speed digital system.It can determine characteristic impedances of DUT,compute accurate models for inductance and capacitance,and predict interconnect component more accurately.

謝辭 Ⅰ
論文提要 Ⅱ
目錄 Ⅲ
圖表目錄 Ⅳ
第一章 緒論 1
第二章 時域反射儀理論基礎 4
2-1 時域反射儀 4
2-1-1 集總與分配電路 6
2-1-2 上升時間及傳播時間 8
2-1-3 步階源上升時間效應 8
2-2 阻抗的計算 10
2-2-1 多重反射 12
2-2-2 計算實際阻抗波形 13
2-2-3 計算電感、電容值 13
2-3 半作圖法決定待測物電感及電容值 14
2-3-1 量測模型 15
2-3-2 量測的條件 16
2-3-3 半作圖法決定電容、電感值 16
第三章 最佳化技術與實踐 22
3-1 最佳化技術 22
3-2 快速傅立葉轉換 22
3-2-1 快速傅立葉轉換法之實踐 23
3-3 最小平方法簡介 27
3-3-1 最小平方法理論說明 28
3-3-2 最小平方法程式說明 31
3-4 最佳化方法及步驟 32
3-5 模擬與量測 35
3-5-1 時域反射儀量測環境 35
3-5-2 待測物特性與說明 36
3-5-3 模擬與量測結果 38
第四章 結論 43
參考文獻 44

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