由於差動訊號傳輸比起單端訊號傳輸，會產生比較低的雜訊以及擁有比較高的共模雜訊抑制能力，非常適合用於高速訊號的傳輸架構。然而要設計一個好的差動傳輸線架構，必須要有好的對稱性與適當的疊層架構設計。尤其當面對一個實際的IC封裝基板時，往往必須屈就於晶片Pad與封裝錫球的位置設計，使差動傳輸線設計產生必要的轉折與不對稱性；或者必須考量到有限的基板設計空間以及有限的基板疊層架構，做出不同的差動傳輸線對稱架構。在本論文中將在常見的四層壓合封裝基板上設計幾種不同的差動傳輸線疊層架構，並且使用向量網路分析儀量測其高頻效應，再利用混合模態散射參數比較其性能。

Differential signaling is suitable for high speed signal transmission due to lower noise induction and higher common-mode noise rejection compared to its single-ended signaling counterpart. However, for a high performance differential transmission-line pair, excellent symmetry and appropriate design for substrate layer stack-up is necessary. Especially for a practical IC package substrate, differential transmission-line pair is inevitable for asymmetry because of considering the locations of IC pads and solderballs. Furthermore, different differential transmission-line pair architectures are also demanded in consideration of limited substrate floorplan space and substrate layer stack-up structures. In this thesis, several differential pairs have been implemented on the conventional 4-layer laminate package substrate. The consequent high frequency performances are measured using vector network analyzer and then compared by converting into mixed-mode S-parameters.

第一章 緒論
1.1 研究動機
1.2差動信號傳輸簡介
1.3文獻探討
1.4 章節介紹
第二章 封裝基板差動傳輸線設計
2.1封裝基板製程技術簡介
2.2差動傳輸線設計
2.2.1 設計目的
2.2.2 設計結構
第三章 差動傳輸線傳播模態與混合模態散射參數
3.1 差動傳輸線實體架構
3.2 奇模態與偶模態
3.3 差動傳輸線特性阻抗
3.4混合模態散射參數
3.5 共模排斥比（CMRR）
第四章 差動傳輸線特性比較與分析
4.1量測環境設定
4.1.1散射參數量測
4.1.2特性阻抗量測
4.2電磁模擬與量測驗證
4.3差動傳輸線特性比較與分析
4.3.1差動微帶線特性分析
4.3.2差動帶狀線特性分析
4.3.3共平面差動結構分析
4.3.4接地平面設計的影響
4.3.5不同設計層的影響
第五章 結論
參考文獻

[1] Z. Chen, G. Katopis, “A comparison of performance potentials of single ended vs. differential signaling,” in Proc. 13th, Electrical Performance of Electronic Packaging Conf., 2004, pp.185-188.
[2] M. M. Mechaik, “An evaluation of single-ended and differential impedance in PCBs,” in IEEE Quality Electronic Design Symp. Dig., 2001,pp.301-306.
[3] A. Ohshima, T. Nomura, “High speed differential pin electronics over 6.4 Gbps,” in Proc. IEEE International Test Conference, 2005, pp.9
[4]C. Chiu, H. Ding, “High-frequency characterization of differential signals in a flip-chip organic package,” in Proc. 54th, Electronic Components and Technology Conference, 2004, pp.1796-1801.
[5] A. Tsuchiya, Y. Gotoh, M. Hashimoto, H. Onodera, “Performance limitation of on-chip global interconnects for high-speed signaling,” in Proc. IEEE Custom Integrated Circuits Conference, 2004, pp. 489-492.
[6] T. Hamano, Y. Ikemoto, “Electrical characterization of a 500 MHz frequency EBGA package,” IEEE Trans. Advanced Packaging, vol. 24, pp. 534-541, Nov. 2001.
[7] N. Kim, M. Sung, H. Kim, S. Baek, W. Ryu, J. G. An, J. Kim, “Reduction of crosstalk noise in modular jack for high-speed differential signal interconnection,” IEEE Trans. Advanced Packaging, vol. 24,pp. 260-267, Aug. 2001.
[8] H. Shi, V. Echevarria, W. T. Beyene, X. C. Yuan, “EMI evaluation of a differential signaling interconnect at 3.2 Gbps,” in Proc. 14th IEEE Electrical Performance of Electronic Packaging Conf. ,2005, pp.65-68.
[9] D. G. Kam, H. Lee, S. Baek, B. Park, J. Kim, “Enhanced immunity against crosstalk and EMI using GHz twisted differential line structure on PCB,” in IEEE Electromagnetic Compatibility Symp. Dig., 2002, pp. 643-647.
[10] D. G. Kam, H. Lee, J. Kim, J. Kim, “A new twisted differential line structure on high-speed printed circuit boards to enhance immunity to crosstalk and external noise,” IEEE Letters, Microwave and Wireless Components, vol 13, pp. 411-413, Sept. 2003.
[11] R Araneo, C. Wang, X. Gu, S. Celozzi, J. Drewniak, “Differential signalling in PCBs: modeling and validation of dielectric losses and effects of discontinuities,” in IEEE Electromagnetic Compatibility Symp. Dig., 2001, pp. 933-938.
[12] N. Nanju, J. Audet, D. Zwitter, “Discontinuity impacts and design considerations of high speed differential signals in FC-PBGA packages with high wiring density,” in Proc. 14th IEEE Electrical Performance of Electronic Packaging Conf., 2005, pp.107-110.
[13] J. Lee, J. Kim, “Efficiency of differential signaling on cavity noise suppression in applications with reference plane change,” in IEEE Electromagnetic Compatibility Symp. Dig., 2004, pp.203-208.
[14] J. L. Knighten, N.W. Smith, J. T. DiBene, L. O. Hoeft, “EMI common-mode current dependence on delay skew imbalance in high speed differential transmission lines operating at 1 gigabit/second data rates,” in IEEE Quality Electronic Design Symp. Dig., 2000, pp. 309-313.
[15] J. L. Knighten, N. W. Smith, J. T. DiBene, L. O. Hoeft, “Experimental analysis of common mode currents on fibre channel cable shields due to skew imbalance of differential signals operating at 1.0625 Gbs.,” in IEEE Electromagnetic Compatibility Symp. Dig., 1999, pp. 195-200.
[16] G. H. Shiue, W. D. Guo, C. M. Lin, R. B.Wu, “Noise reduction using compensation capacitance for bend discontinuities of differential transmission lines,” IEEE Trans., Advanced Packaging, vol. 29, pp. 560-569, Aug. 2006.
[17]C. Wang, J. Fan, J. L. Knighten, N. W. Smith, R. Alexander, J. L. Drewniak, “The effects of via transitions on differential signals,” in Proc. IEEE Electrical Performance of Electronic Packaging Conf., 2001, pp. 39-42.
[18] C. Wang, J. L. Drewniak, J. Fan, J. L. Knighten, N. W. Smith, R. Alexander, “Transmission line modeling of vias in differential signals,” in IEEE Electromagnetic Compatibility Symp. Dig., 2002, pp. 249-252.
[19]H. Heck, S. Hall, B. Horine, K. Mallory, T. Wig, “Impact of FR4 dielectric non-uniformity on the performance of multi-Gb-s differential signals,” in Proc. IEEE Electrical Performance of Electronic Packaging Conf., 2003, pp. 243-246.
[20]H. Johnson, M. Graham, High-Speed Signal Propagation, Prentice Hall, 2002
[21] T. Swirbel, A. Naujoks, M. Watkins, “Electrical design and simulation of high density printed circuit boards,” IEEE Trans., Advanced Packaging, vol. 22, pp. 416-423, Aug. 1999.
[22] A. Seungyoung, A. C. W. Lu; W. Fan, L. L. Wai, J. Kim,“Effects of process variation on signal integrity for high speed differential signaling on package level,” in Proc. IEEE Electronics Packaging Technology Conf., 2002, pp. 249-252.
[23]B. C. Wadell, Transsion Line Design Handbook, Artech House,1991
[24] S. S. Bedair, I. Wolff, “Fast and accurate analytic formulas for calculating the parameters of a general,” IEEE Trans, Microwave Theory and Techniques, vol. 37, pp. 843-850, May 1989.
[25]G. Ghione, C. U. Naldi,“Coplanar Waveguides for MMIC Applications:Effect of Upper Shielding Conductor Backing,Finite-Extent Ground Planes,and Line-to-Line Coupling,’’ IEEE Trans., Microwave Theory and Techniques, vol.MTT-35,No.3, pp.260-267, March 1987.
[26] C. P. Wen,“Coplanar-Waveguide Directional Couplers,’’ IEEE Trans., Microwave Theory and Techniques, vol. MTT-18, No.6,pp.318-322, June 1970.
[27] C. L. Liao, C. H. Chen, “Quasistatic and fullwave analyses of conductor-backed edge-coupled coplanar-waveguide structures,” in Proc. Microwave Conference, 2001, pp. 181-184.
[28] M. Kirschning, H .J. Rolf,“Accurate Wide-Range Design Equations for the Frequency-Dependent Characteristic of Parallel Coupled Microstrip Lines,’’ IEEE Trans., Microwave Theory and Techniques, vol. MTT-32,No.1, pp.83-90, January1984.
[29] V. Golumbeanu, C. Ionescu, “Some parameters of dual stripline,” in Proc. 24th, Electronics Technology Spring Seminar, 2001, pp. 197-201.
[30] S. B. Cohn, “Shielded Coupled-Strip Transmission Line,” IEEE Trans., Microwave Theory and Techniques, vol 3, Issue 5, pp.29-38, Oct 1955.
[31] 薛光華, “差模轉角與信號線跨槽不連續結構之模型化、分析與設計,” 國立台灣大學電機工程學系博士論文, 民國九十五年
[32] F. M. Pitschi, J. E. Kiwitt, K. C. Wagner, H. Bilzer, P. Schuh, W. Menzel, “Combined differential and common-mode scattering parameters- theory and simulation,” in IEEE Ultrasonics Symp. Dig., 2003, pp. 401-406.
[33] A. Penkar, M. Caggiano, “Measurement and analysis of packages with differential signaling scheme,” in Proc. 26th, Electronics Technology: Integrated Management of Electronic Materials Production International Spring Seminar, 2003, pp. 452-455.
[34] J. Millman, A. Grabel, Microelectronics, McGraw- Hill, 1987.