本研究利用原子層沉積系統(ALD)生長氧化鋁和氧化鈦薄膜於磷化銦基板上，作為金氧半場效電晶體之閘極氧化層與源極或汲極蕭特基穿隧能障(asymmetrical Schottky barrier MOSFET)。首先，為了使界面能有良好的特性先使用硫化銨溶液減少在基板表面上的原生氧化層，未經硫化銨處理過的磷化銦基板與鋁金屬形成的蕭特基二極體結構，其蕭特基能障 (ΦBp)為0.341 eV，在經硫化銨處理過後，其蕭特基能障大幅上升至0.538 eV，意味會造成介面態密度的原生氧化層借由硫化銨處理去除，使得蕭特基能障不再受費米能階釘札(Fermi level pinning)的影響，為了改善閘極氧化鈦薄膜的品質，研究氧化鈦與氧化鋁雙層結構改善單層氧化鈦之特性，並可藉由氧化鋁自我清潔能力改善氧化層與基板之界面，使閘極漏電流由單層氧化鈦的2.48 × 10-5 和 8.08 × 10-3 降至1.49 × 10-8 和 2.03 × 10-6 A/cm2 at ± 2 MV/cm。此外，為了改善元件縮小化產生之短通道效應所引起之漏電流，採用蕭特基超淺接面深度的特性做為源極與汲極改善短通道效應，而經硫化處理過之磷化銦基板與鋁金屬形成的蕭特基接觸電阻值來到2.1 × 109 Ω，所以我們在磷化銦基板與鋁金屬之間加入穿隧氧化層以降低能障 (ΦBn)來提高電流，分別研究三種加了介電層結構的蕭特基穿隧二極體來作為源極與汲極區域，在這三種結構中發現加了氧化鋁與氧化鈦雙層結構在逆向偏壓下電流來的最大。而此應用在蕭特機穿隧能障電晶體(Schottky tunneling barrier MOSFET)的源極與汲極上能有效提升飽和電流，但是在關閉(off-state)的情況下由於能障的降低也造成漏電流有所提升，為了降低漏電流我們將穿隧能障氧化層的結構只應用在源極，而汲極區域的高能障能夠使得漏電流能在關閉(off-state)的狀態下有效降低，並且保有與蕭特機穿隧能障電晶體相近之飽和電流，進而提高電晶體之ION/IOFF的比例來到十的五次方。

In this study, the thin titanium oxide (TiO2) film and aluminum oxide (Al2O3) films which was used as gate oxides of InP asytmmetrical Schottky barrier MOSFET were deposited on InP substrate that was prepared by atomic layer deposition (ALD). First, in order to having good quality of interface, the (NH4)2S solution is a good method to reduce surface native oxide on InP. The Al/InP Schottky diode’s Schottky barrier height (ΦBp) is 0.341 eV without sulfur treatment. The Al/InP Schottky barrier height is promoted to 0.538 eV after sulfur treatment. Therefore, Schottky barrier will not be influenced by Fermi level pinning with fewer native oxide. we made of improvement quality for existing titanium oxides, using double stack of titanium oxide (TiO2) and aluminum oxide (Al2O3) by ALD can be used to improve single layer of TiO2. Al2O3 of ALD has self-cleaning which could improve interface quality between oxide and substrate, the leakage current densities can reach 2.48 × 10-5 and 8.08 × 10-3 reduce to 1.49 × 10-8 和 2.03 × 10-6 A/cm2 at ± 2 MV/cm. Besides, in order to reduce leakage current from the short channel effects which are caused by device scaled. We used Schottky contact which has ultra shallow junction depth. The contact resistance of Al/InP is 2.1 × 109 Ω after InP with sulfur treatment. So, we investigate three structures of Schottky tunneling barrier diodes in inserting dielectrics as source/drain regions. From my experiments can be found the double layers of Al2O3/TiO2 has the highest current at reverse bias in these three structures. This Schottky tunneling barrier structure used in Schottky tunneling barrier MOSFET source and drain regions which can promote saturation current.But the leakage current increase which is caused by reduction of Schottky barrier height at off-state. In order to reduce leakage current we only used Schottky tunneling barrier structure in source region. Therefore, the drain region with high Schottky barrier height can reduce leakage current at off-state and it has similar saturation current to Schottky tunneling barrier MOSFET. Therefore, the ION/IOFF ratio is reach 105.

論文審定書 i
ACKNOWLEDGMENT ii
中文摘要 iii
ABSTRACT iv
LIST OF FIGURES ix
LIST OF TABLES xiv
Chapter 1 1
Introduction 1
1-1 Developments in gate dielectric 1
1-2 Properties of TiO2 3
1-3 Comparison of deposition methods of TiO2 4
1-4 Advantages of ALD 5
1-5 Drawback of TiO2 for MOSFETs 6
1-6 Drawbacks of SB on III-V compound semiconductors 7
1-7 Mechanism and the structure model of InP with sulfur treatment 10
1-8 Properties of Al2O3 10
1-9 ALD-TiO2/Al2O3 on (NH4)2S treated III-V compound semiconductor structure 11
1-10 Principle of Schottky tunneling barrier 14
1-11 III-V asymmetrical Schottky barrier MOSFET 14
1-11-1 Operation principle for the n-ASBMOSFET in channel 16
Chapter 2 29
Experiments 29
2-1 Al2O3 and TiO2 are prepared by ALD 29
2-1-1 CVD theorem 29
2-1-2 Deposition system of ALD 30
2-1-3 Properties of source materials 31
2-2 Structure procedures and film depositions 32
2-2-1 III-V wafer cleaning and sulfidation procedures 32
2-2-2 Preparation of Al2O3/TiO2 stack films 33
2-2-3 Al metal and In-Zn alloy cleaning processes 33
2-2-4 Electrodes fabrication 34
2-2-5 Preparations of Al/Al2O3/InP、Al/TiO2/InP and Al/Al2O3/TiO2/InP Schottky tunneling barrier diode with (NH4)2S treatment 34
2-2-6 Preparations of Transmsion Line Model (TLM) to measure asymmetrical Schottky barrier structure 35
2-3 Characterization 35
2-3-1 Physical properties 35
Chapter 3 49
MOS with Various Gate Structures Characteristics of ALD-TiO2 and ALD-TiO2/Al2O3 on S-InP 49
3-1 TEM cross section of TiO2/Al2O3/S-InP structure 49
3-2 I-V characteristics of TiO2/Al2O3 stacked dielectrics on (NH4)2S treated on InP 49
3-3 C-V characteristics of Al2O3/TiO2 stacked dielectrics on (NH4)2S treated on InP 50
3-4 Tentative conclusion 52
Chapter 4 57
Characteristics of Schottky Tunneling Barrier Diodes and Asymetrical Schottky Barrier TLM 57
4-1 Electrical characteristics of Al/S-InP diode 57
4-2 Electrical characteristics of Al/Al2O3/S-InP diode 57
4-3 Electrical characteristics of Al/TiO2/S-InP diode 59
4-4 Electrical characteristics of Al/Al2O3/TiO2/S-InP diode 60
4-5 Electrical characteristics of TLM measured the symmetrical and asymmetrical Schottky barrier structure 61
4-6 Tentative conclusion 62
Chapter 5 82
Electrical Characteristics of Enhancement-mode n-Channel InP Asymmetrical Schottky Tunneling Barrier MOSFET 82
5-1 Fabrication process of enhancement-mode n-channel asymmetrical Schottky barrier MOSFET with ALD- TiO2 /Al2O3 as gate oxides on S-InP 82
5-2 Electrical characteristics of enhancement-mode n-channel asymmetrical Schottky barrier MOSFET with ALD-TiO2/Al2O3 as gate oxides on S-InP 83
5-3 Tentative conclusion 86
Chapter 6 97
Conclusion 97
References 99

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