本論文以台積電0.25 1P5M CMOS 製程設計一應用於2.4GHz頻段之無線區域網路影像拒絕降頻器，其優點為整合了一主動式濾波器，除了能濾除影像頻率外，亦可以降低電路中因元件寄生電容使雜訊指數惡化的效應。另以台積電 0.35 1P4M CMOS製程來設計差動電感電容式壓控振盪器，其具有低相位雜訊及較大可調振盪頻率範圍等優點。最後以美國GCS公司之 GaAs HBT製程設計一應用於PCS頻段可變增益放大器，採用訊號加成式可變增益架構，其優點為低雜訊與失真，並可操作於高頻段。本論文將對所設計晶片量測結果與模擬間的差距做深入討論，以作為將來設計時的依據。

This thesis presents a 2.4GHz image-reject downconverter fabricated in TSMC 0.25 1P5M CMOS process. The integrated active filter can not only filter out the image signal, but also reduce noise figure degraded by parasitic capacitance in the circuit. The differential LC oscillator fabricated in TSMC 0.35 1P4M CMOS process has properties of low phase noise and wide frequency turning range. Finally, a variable gain amplifier implemented in GCS GaAs HBT process was designed using signal summing architecture. The architecture is advantageous to reducing noise, distortion and increasing operating frequency. This thesis has studied what cause the difference between measurement and simulation for better performance in the future design.

目錄 I
圖目錄 II
表目錄 V
第一章 緒論 1
第二章 具影像拒絕功能低雜訊放大器與混波器之CMOS RFIC 設計 4
2.1 簡介 4
2.2 設計方法 5
2.2.1 具有影像頻率抑制功能低雜訊放大器設計方法 5
2.2.2 開汲極雙平衡式混波器設計方法 8
2.2.3具影像拒絕功能低雜訊放大器與混波器設計方法 9
2.3 模擬結果 9
2.3.1 影像頻率抑制功能低雜訊放大器模擬結果 9
2.3.2 開汲極混波器模擬結果 12
2.4 量測結果與討論 16
第三章 差動電感電容式壓控振盪器之CMOS RFIC 設計 25
3.1 簡介 25
3.2 設計方法 27
3.3 模擬結果 29
3.4 量測結果與討論 31
第四章 訊號加成式可變增益放大器之HBT MMIC設計 34
4.1 簡介 34
4.2 設計方法 35
4.3 模擬結果 37
4.4 量測結果與討論 39
第五章 結論 44
參考文獻 45

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