本篇論文以探討2.4 GHz ISM頻段應用之射頻前端電路架構，進而實現射頻發射端之正交調制器與線性功率放大器的電路設計。在正交調制器方面，我們以混合式元件配合印刷電路板製程技術製作並且應用於數位訊號調制的正交調制器。電路製作包括90度偏移功率分配器、功率結合器，以及雙平衡混頻器。論文中詳細說明雙平衡混頻器的設計架構與原理以及實際量測的結果，之後將電路組合而成一正交調制器並予以嚴密的規格測試。論文中也詳細地敘述整個正交調制器完整的測試方法、架構與儀器設置。而在線性功率放大器方面，我們採用0.18μm CMOS製程以晶片來實現一個操作頻率為2.4 GHz的 A類線性功率放大器，其功率電晶體架構採用疊接形式設計；另外在放大器部分採用全差動式設計，因此在輸出端與輸入端採用巴倫器來將訊號做差動與單端的轉換，並且達到阻抗匹配的功能。

This thesis investigates the development and research about the RF front-end circuit designs for 2.4 GHz ISM band transmitter applications. On the quadrature modulator part, we use the hybrid components on PCB to realize the quadrature modulator for the digital signal modulation. The circuit includes the power splitter of 90 degrees phase offset, power combiner, and the double-balanced mixer. This thesis presents the design, theory, and the measurement results for the double-balanced mixer in detail. And then, we integrate the circuits for the quadrature modulator and process the strict specification test. And also, the setup, the testing methods, and the setting of the instruments are presented in the thesis. On the linear power amplifier part, we realize an integrated class A power amplifier at 2.4 GHz in a standard 0.18μm CMOS process. The cascode structure is used in the power cells since the power amplifier is a fully differential design. A balun is utilized to convert between single-ended and differential signals and serve as an impedance matching network.

論文審定書 i
誌謝 ii
摘要 iii
Abstract iv
目錄 v
圖次 vii
表次 x
第一章 緒論 1
1.1 研究背景與動機 1
1.2 章節規劃 7
第二章 2.4~2.6 GHz正交調制器 8
2.1 架構簡介 8
2.1.1 直接升頻發射機架構簡介 8
2.1.2 正交調制器架構簡介 10
2.1.3 混頻器架構簡介 11
2.2 雙平衡混頻器 12
2.2.1 設計原理 12
2.2.2 電路設計 14
2.2.3 實作與量測結果 16
2.3 正交調制器之整合與規格測試 23
2.3.1 電路整合 23
2.3.2 量測方法與儀器設置 24
2.3.3 實作與量測結果 30
第三章 CMOS線性功率放大器 37
3.1 線性功率放大器 37
3.1.1 基本設計理論 37
3.1.2 功率放大器設計理論 41
3.1.3 功率放大器分類 48
3.2 晶片電路設計 56
3.2.1 電路架構的選擇與考量 56
3.2.2 設計流程 58
3.2.3 功率放大器設計方法與考量 59
3.3 晶片電路模擬與量測結果 61
3.3.1 模擬結果 61
3.3.2 量測方法與儀器設置 64
3.3.3 量測結果討論與檢討 66
第四章 結論 70
參考文獻 71

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