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論文名稱 Title |
具有摻雜鹽酸的氧化銦鎵鋅異質接面突觸電晶體之研究 Research on HCl-Doped IGZO Heterojunction Synaptic Transistors |
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系所名稱 Department |
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畢業學年期 Year, semester |
語文別 Language |
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學位類別 Degree |
頁數 Number of pages |
131 |
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研究生 Author |
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指導教授 Advisor |
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召集委員 Convenor |
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口試委員 Advisory Committee |
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口試日期 Date of Exam |
2024-08-23 |
繳交日期 Date of Submission |
2024-08-27 |
關鍵字 Keywords |
霧化化學氣相沉積法、突觸電晶體、異質接面、氧化銦鎵鋅、非晶氧化鉿鋁、短期記憶、長期記憶、氫離子 mist chemical vapor deposition (Mist CVD), synaptic transistor, heterojunction, indium gallium zinc oxide (IGZO), amorphous hafnium oxide-alumina, short-term memory, long-term memory, hydrogen ions |
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統計 Statistics |
本論文已被瀏覽 63 次,被下載 0 次 The thesis/dissertation has been browsed 63 times, has been downloaded 0 times. |
中文摘要 |
本論文使用霧化化學氣相沉積法(Mist CVD)製作具有摻雜鹽酸的氧化銦鎵鋅異質接面突觸電晶體,絕緣層採用氧化鋁(Al_2 O_3)與非晶氧化鉿鋁(Hf_0.2 Al_0.8 O),通道層則選用In_0.8 Ga_0.1 Zn_0.1、In_0.1 Ga_0.1 Zn_0.8形成異質接面,通過X射線光電子能譜儀(XPS)、橢圓偏光儀等材料儀器量測,了解材料的實際比例、氧空位含量以及能隙大小,之後再進行突觸電性量測,分成短期與長期可塑性量測,以探討不同絕緣層和摻雜鹽酸的通道層對於突觸特性的影響。 由於銦的鍵長較長易產生氧空位,經XPS分析顯示In_0.8 Ga_0.1 Zn_0.1的氧空位比例較In_0.1 Ga_0.1 Zn_0.8高出5%,而橢圓偏光儀量測則顯示In_0.8 Ga_0.1 Zn_0.1能隙比In_0.1 Ga_0.1 Zn_0.8低0.39eV,因而挑選In_0.8 Ga_0.1 Zn_0.1做為前通道層以增加電子停留時間。在通道層有能隙差異的幫助下,In_0.1 Ga_0.1 Zn_0.8/ In_0.8 Ga_0.1 Zn_0.1/Al_2 O_3在突觸長期可塑性方面的長期增強作用獲得顯著進步,可達到30秒以上,在In_0.8 Ga_0.1 Zn_0.1摻雜鹽酸後,利用氫離子較慢返回的移動速度牽制電子的復位,進而提升記憶時間。然而,當絕緣層為氧化鉿鋁時,因為沉積雙通道層時較長的升溫導致氧化鋁中的氧擴散至氧化鉿鋁補足氧空位,降低極化效果,因此,雙通道元件表現不出色,相反的,單通道層In_0.8 Ga_0.1 Zn_0.1 (Cl)/Hf_0.2 Al_0.8 O/Al_2 O_3的長期增強作用的記憶時間能輕易達到30秒,此外,In_0.1 Ga_0.1 Zn_0.8/Hf_0.2 Al_0.8 O/Al_2 O_3在短期可塑性的成對脈衝促進和強直後加成之增益值可高達214%與615%,其原因在於In_0.1 Ga_0.1 Zn_0.8氧空位較少且有氧化鉿鋁的極化作用加成,使電子受到缺陷的庫倫作用力較小、移動較快,增加對於脈衝的響應,但是同時也會減弱長期增強作用。 本研究以霧化化學氣相沉積法,製作出四種氧化銦鎵鋅異質接面突觸電晶體,在突觸應用上有良好的表現,結果顯示,雙層通道層結構中摻雜鹽酸有助於突觸長期可塑性表現,且短期與長期可塑性呈現拮抗結果,此外,該沉積法能在一般大氣環境下操作,顯著降低沉積難度與製造成本。 |
Abstract |
This paper uses mist chemical vapor deposition (Mist CVD) to fabricate heterojunction synaptic transistors made of indium gallium zinc oxide (IGZO) doped with hydrochloric acid. The insulating layers are alumina (Al2O3) and amorphous hafnium oxide-alumina (Hf0.2Al0.8O), while the channel layers are In0.8Ga0.1Zn0.1 and In0.1Ga0.1Zn0.8. Using X-ray photoelectron spectroscopy (XPS) and ellipsometer, material ratios, oxygen vacancy content, and bandgap size were determined. Synaptic electrical measurements, including short-term plasticity and long-term plasticity, explored the effects of different insulating layers and hydrochloric acid-doped channel layers on synaptic characteristics. XPS analysis revealed In0.8Ga0.1Zn0.1 had 5% more oxygen vacancies than In0.1Ga0.1Zn0.8. Ellipsometry showed In0.8Ga0.1Zn0.1 had a 0.39 eV lower bandgap than In0.1Ga0.1Zn0.8, increasing electron retention time. With bandgap differences, the long-term potentiation (LTP) of the In0.1Ga0.1Zn0.8/In0.8Ga0.1Zn0.1/Al2O3 structure improved significantly, exceeding 30 seconds. Doping In0.8Ga0.1Zn0.1 with hydrochloric acid further enhanced memory time by restricting electron reset through slower hydrogen ion return. However, when the insulating layer was Hf0.2Al0.8O, prolonged heating during double-channel layer deposition led to oxygen diffusion, reducing polarization effects. Consequently, the memory time of the single-channel In0.8Ga0.1Zn0.1(Cl)/ Hf0.2Al0.8O/ Al2O3 could also reach 30 seconds. Additionally, the pair-pulse facilitation (PPF) and post-tetanic potentiation (PTP) of In0.1Ga0.1Zn0.8/Hf0.2Al0.8O/Al2O3 achieved gain values up to 214% and 615%, respectively. This is due to fewer oxygen vacancies and additive polarization effects, resulting in faster electron movement and increased pulse response, but weaker LTP. This study demonstrates that Mist CVD can fabricate IGZO synaptic transistors with excellent synaptic performance. Hydrochloric acid doping in the double-layer channel structure enhances LTP, with short-term and long-term plasticity showing antagonistic results. Moreover, this method operates in a general atmospheric environment, reducing deposition difficulty and manufacturing cost. |
目次 Table of Contents |
論文審定書 i 誌謝 ii 摘要 iii Abstract iv 目錄 v 圖目錄 vii 表目錄 xv 第 1 章 導論 1 第 2 章 元件製程與薄膜沉積 8 2-1 基板清洗(Substrate Cleaning) 9 2-2 前驅溶液的調製 (Preparation of Precursor Solution) 10 2-3 閘極絕緣層沉積 (Deposition of Gate Insulating Layer) 11 2-4 快速熱退火 (Rapid Thermal Annealing) 12 2-5 主動層沉積 (Deposition of Active Layer) 13 2-6 黃光微影 (Photolithography) 14 2-7 源/汲極金屬電極沉積 (Deposition of Metal Electrodes) 14 2-8 金屬剝離 (Metal Lift-off) 15 2-9 突觸電晶體元件命名 (Synaptic Transistor Device Naming) 16 第 3 章 實驗結果與討論 19 3-1 材料分析 19 3-1-1 X射線光電子能譜儀(X-ray photoelectron spectroscopy, XPS) 19 3-1-2 X射線繞射儀(X-ray diffractometer, XRD) 26 3-1-3 橢圓偏光儀分析(Ellipsometer) 29 3-2 量測條件與電性參數介紹 32 3-2-1 Al2O3 --單層主動層與有無摻雜鹽酸之突觸電性分析 41 3-2-2 Al2O3 --雙層主動層與有無摻雜鹽酸之突觸電性分析 58 3-3 氧化鉿鋁絕緣層突觸電晶體之突觸電性分析 77 3-3-1 非晶氧化鉿鋁極化簡介 77 3-3-2 Al2O3/Hf0.8Al0.2O --單層主動層與有無摻雜鹽酸之突觸電性分析 78 3-3-3 Al2O3/Hf0.8Al0.2O –雙層主動層與有無摻雜鹽酸之突觸電性分析 94 3-4 文獻比較 106 第 4 章 結論與未來展望 110 4-1 結論 110 4-2 未來展望 111 參考文獻 112 |
參考文獻 References |
[1] “60 years of integrated circuits,” Nature Electronics, vol. 1, no. 9, pp. 483-483, 2018. [2] G. O’Regan, "The Invention of the Integrated Circuit and the Birth of Silicon Valley," Introduction to the History of Computing: A Computing History Primer, G. O'Regan, ed., pp. 93-100, Cham: Springer International Publishing, 2016. [3] Z. Zhi, “Research and Design of Industrial IoT Device Management System Based on 5G Communication and Big Data Technology,” in 2022 2nd International Signal Processing, Communications and Engineering Management Conference (ISPCEM), 2022, pp. 47-51. [4] S. V. Mahadevkar, B. Khemani, S. Patil, K. Kotecha, D. R. Vora, A. Abraham, and L. A. Gabralla, “A Review on Machine Learning Styles in Computer Vision—Techniques and Future Directions,” IEEE Access, vol. 10, pp. 107293-107329, 2022. [5] W. Wu, H. Xinhan, W. Min, and S. Yexin, “An automatic system of vehicle number-plate recognition based on neural networks,” Journal of Systems Engineering and Electronics, vol. 12, no. 2, pp. 63-72, 2001. [6] P. A. Merolla, J. V. Arthur, R. Alvarez-Icaza, A. S. Cassidy, J. Sawada, F. Akopyan, B. L. Jackson, N. Imam, C. Guo, Y. Nakamura, B. Brezzo, I. Vo, S. K. Esser, R. Appuswamy, B. Taba, A. Amir, M. D. Flickner, W. P. Risk, R. Manohar, and D. S. Modha, “Artificial brains. A million spiking-neuron integrated circuit with a scalable communication network and interface,” Science, vol. 345, no. 6197, pp. 668-73, Aug 8, 2014. [7] Y. Zhu, H. Mao, Y. Zhu, X. Wang, C. Fu, S. Ke, C. Wan, and Q. Wan, “CMOS-compatible neuromorphic devices for neuromorphic perception and computing: a review,” International Journal of Extreme Manufacturing, vol. 5, no. 4, 2023. [8] J. Backus, “Can programming be liberated from the von Neumann style? a functional style and its algebra of programs,” Commun. ACM, vol. 21, no. 8, pp. 613–641, 1978. [9] G. E. Moore, “Cramming more components onto integrated circuits, Reprinted from Electronics, vol. 38, no. 8, April 19, 1965, pp.114 ff,” IEEE Solid-State Circuits Society Newsletter, vol. 11, no. 3, pp. 33-35, 2006. [10] D. Kuzum, S. Yu, and H. S. Wong, “Synaptic electronics: materials, devices and applications,” Nanotechnology, vol. 24, no. 38, pp. 382001, Sep 27, 2013. [11] K. He, C. Wang, Y. He, J. Su, and X. Chen, “Artificial Neuron Devices,” Chem Rev, vol. 123, no. 23, pp. 13796-13865, Dec 13, 2023. [12] N. K. Upadhyay, H. Jiang, Z. Wang, S. Asapu, Q. Xia, and J. Joshua Yang, “Emerging Memory Devices for Neuromorphic Computing,” Advanced Materials Technologies, vol. 4, no. 4, 2019. [13] J. Zhu, T. Zhang, Y. Yang, and R. Huang, “A comprehensive review on emerging artificial neuromorphic devices,” Applied Physics Reviews, vol. 7, no. 1, 2020. [14] H. Ling, D. A. Koutsouras, S. Kazemzadeh, Y. van de Burgt, F. Yan, and P. Gkoupidenis, “Electrolyte-gated transistors for synaptic electronics, neuromorphic computing, and adaptable biointerfacing,” Applied Physics Reviews, vol. 7, no. 1, 2020. [15] L. L. Zhang, and X. S. Zhao, “Carbon-based materials as supercapacitor electrodes,” Chem Soc Rev, vol. 38, no. 9, pp. 2520-31, Sep, 2009. [16] J. Li, W.-H. Fu, L.-K. Li, D.-L. Jiang, L.-C. He, W.-Q. Zhu, and J.-H. Zhang, “Recent advances in solid electrolytes for synaptic transistors,” Organic Electronics, vol. 95, 2021. [17] D. Lv, Q. Yang, Q. Chen, J. Chen, D. Lai, H. Chen, and T. Guo, “All-metal oxide synaptic transistor with modulatable plasticity,” Nanotechnology, vol. 31, no. 6, pp. 065201, Jan 31, 2020. [18] Y. M. Fu, H. Li, L. Huang, T. Wei, F. Hidayati, and A. Song, “Sputtered Electrolyte‐Gated Transistor with Modulated Metaplasticity Behaviors,” Advanced Electronic Materials, vol. 8, no. 10, 2022. [19] J. Zhou, C. Wan, L. Zhu, Y. Shi, and Q. Wan, “Synaptic Behaviors Mimicked in Flexible Oxide-Based Transistors on Plastic Substrates,” IEEE Electron Device Letters, vol. 34, no. 11, pp. 1433-1435, 2013. [20] Y. Jang, J. Park, J. Kang, and S.-Y. Lee, “Amorphous InGaZnO (a-IGZO) Synaptic Transistor for Neuromorphic Computing,” ACS Applied Electronic Materials, vol. 4, no. 4, pp. 1427-1448, 2022. [21] S. Dai, Y. Zhao, Y. Wang, J. Zhang, L. Fang, S. Jin, Y. Shao, and J. Huang, “Recent Advances in Transistor‐Based Artificial Synapses,” Advanced Functional Materials, vol. 29, no. 42, 2019. [22] H. Ryu, H. Wu, F. Rao, and W. Zhu, “Ferroelectric Tunneling Junctions Based on Aluminum Oxide/ Zirconium-Doped Hafnium Oxide for Neuromorphic Computing,” Sci Rep, vol. 9, no. 1, pp. 20383, Dec 31, 2019. [23] Y. Lee, H. Jo, K. Kim, H. Yoo, H. Baek, D. R. Lee, and H. Oh, “IGZO synaptic thin-film transistors with embedded AlOx charge-trapping layers,” Applied Physics Express, vol. 15, no. 6, pp. 061005, 2022/05/27, 2022. [24] J. Kim, Y. Kim, O. Kwon, T. Kim, S. Oh, S. Jin, W. Park, J. D. Kwon, S. W. Hong, C. S. Lee, H. Y. Ryu, S. Hong, J. Kim, T. Y. Heo, and B. Cho, “Modulation of Synaptic Plasticity Mimicked in Al Nanoparticle‐Embedded IGZO Synaptic Transistor,” Advanced Electronic Materials, vol. 6, no. 4, 2020. [25] Z. Fan, and J. G. Lu, “Zinc oxide nanostructures: synthesis and properties,” J Nanosci Nanotechnol, vol. 5, no. 10, pp. 1561-73, Oct, 2005. [26] N. Tiwari, R. N. Chauhan, P.-T. Liu, and H.-P. D. Shieh, “Electrical characteristics of InGaZnO thin film transistor prepared by co-sputtering dual InGaZnO and ZnO targets,” RSC Advances, vol. 5, no. 64, pp. 51983-51989, 2015. [27] T. Kamiya, K. Nomura, and H. Hosono, “Present status of amorphous In-Ga-Zn-O thin-film transistors,” Sci Technol Adv Mater, vol. 11, no. 4, pp. 044305, Aug, 2010. [28] M. N. Chaudhari, “Thin film Deposition Methods: A Critical Review,” International Journal for Research in Applied Science and Engineering Technology, vol. 9, no. VI, pp. 5215-5232, 2021. [29] P. Zaumseil, “High-resolution characterization of the forbidden Si 200 and Si 222 reflections,” J Appl Crystallogr, vol. 48, no. Pt 2, pp. 528-532, Apr 1, 2015. [30] Y. M. Fu, J. Zhang, W. Cai, J. Wilson, J. Brownless, T. Wei, and A. Song, “Sputtered Oxide Thin-Film Transistors With Tunable Synaptic Spiking Behavior at 1 V,” IEEE Transactions on Electron Devices, vol. 68, no. 6, pp. 2736-2741, 2021. [31] C. Zhang, B. F. Yang, D. Wang, Z. Y. Zhou, C. Y. Han, L. X. Qian, P. T. Lai, and X. D. Huang, “InGaZnO Synaptic Transistor Using Metal-Hydroxyl Traps at Back Channel for Weight Modulation,” IEEE Transactions on Electron Devices, vol. 70, no. 9, pp. 4958-4962, 2023. [32] W. Cheng, R. Liang, H. Tian, C. Sun, C. Jiang, X. Wang, J. Wang, T.-L. Ren, and J. Xu, “Proton Conductor Gated Synaptic Transistor Based on Transparent IGZO for Realizing Electrical and UV Light Stimulus,” IEEE Journal of the Electron Devices Society, vol. 7, pp. 38-45, 2019. [33] Y. He, S. Nie, R. Liu, Y. Shi, and Q. Wan, “Indium–Gallium–Zinc–Oxide Schottky Synaptic Transistors for Silent Synapse Conversion Emulation,” IEEE Electron Device Letters, vol. 40, no. 1, pp. 139-142, 2019. [34] M. Zhu, G. He, C. Fu, Q. Hu, Z. Chen, W. Wang, and S. Jiang, “Implementation of BCM Learning Rule Based on Room Temperature Derived α-IGZO Synaptic Transistors,” IEEE Transactions on Electron Devices, vol. 70, no. 12, pp. 6301-6306, 2023. [35] L. Li, Y. Shao, X. Wang, X. Wu, W.-J. Liu, D. W. Zhang, and S.-J. Ding, “Flexible Femtojoule Energy-Consumption In-Ga-Zn-O Synaptic Transistors With Extensively Tunable Memory Time,” IEEE Transactions on Electron Devices, vol. 67, no. 1, pp. 105-112, 2020. [36] T. Lim, J. Bae, B. Han, A. Ali, and J. Jang, “Artificial Synaptic InGaZnO Thin-Film Transistor With Long Retention Behavior Using Al2O3/SiO2 Gate Insulator,” IEEE Transactions on Electron Devices, vol. 70, no. 1, pp. 135-139, 2023. [37] D. Kang, W. Kim, J. T. Jang, C. Kim, J. N. Kim, S.-J. Choi, J.-H. Bae, D. M. Kim, Y. Kim, and D. H. Kim, “Short- and Long-Term Memory Based on a Floating-Gate IGZO Synaptic Transistor,” IEEE Access, vol. 11, pp. 20196-20201, 2023. |
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