本論文根據國際電工委員會所提出針對積體電路電磁放射量測標準法規IEC 61967-6：磁場探針量測法之標準規定，首先建立近場電磁干擾量測架構；再進行磁場探針之微帶線校正法及空間解析度量測，作主動式探針與被動式探針靈敏度與空間解析度之特性參數比較；並利用實現於FR4玻璃纖維金屬雙面板之交叉耦合平面微波帶通濾波器進行近場量測與電磁模擬做比較，驗證近場量測架構與HFSS電磁模擬之準確性，亦從濾波器近場量測結果再次驗證兩者探針靈敏度與空間解析度之特性參數比較結果。隨著現今電子系統之積體電路已成為整體電磁干擾能量的重要來源，為此本論文最後則利用高掃描解析度之主動式探針，藉由WB-QFN封裝晶片及實現於0.18 μm CMOS製程之壓控振盪器晶片做近場量測，探討晶片與封裝層級之電磁干擾現象並實現晶片層級之近場電磁干擾量測技術。

This thesis proposed a near-field electromagnetic interference measurement framework to obtain sensitivity and spatial resolution of the characteristic parameters of magnetic probe based on International Electrotechnical Commission proposed for integrated circuits electromagnetic radiation measurement standards IEC 61967-6 : magnetic probe method. Using cross-coupled planar microwave bandpass filter which is realized by glass fiber board (FR4) for near-field measurement and electromagnetic simulation in comparsion. Nowadays, integrated circuits has become an important source of energy of overall electromagnetic interference in electronic systems. Finally, do near-field scanning measurement for a 64-pin wire-bond quad flat nonlead (WB-QFN) package and the voltage-controlled oscillator chip in 0.18 μm CMOS technology by using high scanning resolution of microprobe. Then observes the chip-level and package-level electromagnetic interference, and achieve chip-level of near-field electromagnetic interference measurement techniques.

論文審定書 i
誌謝 ii
中文摘要 iv
英文摘要 v
目錄 vi
圖目錄 vii
表目錄 xii
第一章 緒論 1
1.1 研究背景與動機 1
1.2 晶片層級之電磁干擾標準介紹 5
1.3 論文章節規畫 20
第二章 近場量測架構建立及磁場探針校正 21
2.1 近場電磁干擾量測架構介紹 21
2.2 微帶線校正法 27
2.3 空間解析度 32
2.4 濾波器之近場電磁干擾量測與電磁模擬驗證 40
第三章 晶片層級之近場電磁干擾 52
3.1封裝晶片之近場電磁干擾量測與電磁模擬驗證 52
3.2 CMOS壓控振盪器晶片之近場電磁干擾量測 64
第四章 結論 84
參考文獻 86

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