隨著世代演進，高速訊號的資料傳輸率越來越高，因此所要求的頻寬也越來高。對於訊號完整度來說，越高頻其對應的波長越短，因此需考慮傳輸線的每一小段的結構參數，這無疑增加維持訊號品質的難度，因此訊號完整度是一項重要且困難的課題。
本論文針對第六代圖形用雙倍資料傳輸率記憶體(GDDR6)之高速訊號在封裝大小傳輸線的訊號完整度優化，考慮一對單端傳輸線，反射、介電損耗和串擾對眼圖所造成影響。不同於印刷電路板，在封裝大小的結構下，接近IC端傳輸線的密度相當高，因此需考量近端串擾帶來的影響，並且權衡近端串擾與遠端串擾的嚴重程度。面積越大的介質材料代表成本越高，因此為了降低成本必須在高密度傳輸線的條件下降低串擾的影響，採用T-stub結構降低遠端串擾並找出適合的T-stub大小，且因為T-stub結構為開路殘斷，因此也考慮T-stub的大小與共振頻率的關係。在實際情況，封裝結構的傳輸線相當密集，當訊號線為多條線的情況時，T-stub與防護線相比，T-stub更具有空間上的優勢，因為防護線的寬度會被貫孔的大小限制，所以防護線通常需要更大的面積。
考慮封裝結構大部分訊號線由IC端連接封裝結構到印刷電路板時，訊號線穿層無法避免。當訊號線由最上層至最下層時會經歷不同大小的貫孔，此時阻抗不匹配的影響必須考慮進去，但為了增加阻抗減少貫孔數量時，發現訊號線的串擾卻增加了，為了同時降低串擾與阻抗匹配的影響，因此探討貫孔擺放的位置，量測訊號的有較佳的眼圖結果。

With the advance of technology, signal’s data rate becomes higher and higher, so the demand for bandwidth is also higher and higher. For signal integrity, higher frequency corresponds to smaller wavelength, so it is necessary to consider every small segment of transmission lines. That no doubt increases the difficulty of signal integrity.
This thesis focuses on the sixth generation of graphics double data rate(GDDR6) of signal integrity of high speed transmission lines on flip-chip packages, and this thesis considers impact of reflection, dielectric loss, and crosstalk on eye diagram at single end transmission lines. Trace density of package is different from that of the printed circuit board (PCB). Package’s trace density is higher especially at IC part, so it is necessary to consider the impact of both near end crosstalk and far end crosstalk, and it is necessary to trade off between near end crosstalk and far end crosstalk.
The manufacturing cost depends on the size, so it is necessary to study the approach to reduce crosstalk at small size. To consider both cost and crosstalk, this thesis uses T-stub structure to reduce far end crosstalk and finds the proper T-stub size. Because T-stub is an open structure, this thesis also studies the relationship between resonant frequency and T-stub. In real case, when package has hundreds of transmission lines, package’s trace density is high. Compared to guard trace, the advantage of T-stub is that T-stub can be used at smaller size, because width of guard trace is limited by via size and guard trace requires larger area.
In package, most of transmission lines connect IC part to PCB part, and transmission lines are inevitable through the layers. Transmission lines pass through many vias from top layer to bottom layer, and the vias have impedance mismatch problem. To improve the impedance problem, we reduce the number of ground vias, but crosstalk may increase. This thesis studies the position of vias to improve both impedance and crosstalk. Finally, the measured eye diagram shows an improvement on both eye height and eye width.

論文審定書 i
致謝 ii
中文摘要 iii
Abstract iv
目錄 vi
圖次 viii
表次 xiii
第一章 緒論 1
1.1 研究動機與背景 1
1.2 相關文獻概況 2
1.3研究方向與方法 8
1.4 論文大綱 9
第二章 串音干擾分析 10
2.1 串擾機制介紹 10
2.2 奇模態 12
2.3 偶模態 14
第三章 封裝結構的T-stub設計 17
3.1阻抗不匹配對訊號完整度之影響探討 18
3.2近端串擾對訊號完整度之影響探討 21
3.3介值損耗對訊號完整度之影響探討 25
3.4 T-stub在封裝結構 27
3.5 T-stub 對於頻率之影響探討 49
3.6多條訊號線耦合分析 52
3.7多條線過線數分析 59
第四章 封裝結構接地核心貫孔位置設計 68
4.1穿層貫孔阻抗分析 68
4.2穿層貫孔串擾分析 72
4.3 貫孔優化分析 72
4.4量測結果比較 74
第五章 結論 85
參考文獻 86

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