未來的無線通訊系統將更關注具有高資料傳輸率或者低功率消耗之特徵。本論文致力於研究並實現寬頻接收機之射頻前端積體電路，以及具有高能源效率之射頻接收機。基於上述目標，本論文涵蓋三個主題。首先，本論文提出具有創新架構之兩款寬頻CMOS 共閘極低雜訊放大器，藉由雙迴授機制讓低雜訊放大器同時做到輸入與雜訊阻抗匹配，並透過晶片上變壓器使電路之增益頻寬得以延伸。第二，本論文提出覆晶式射頻前端模組封裝，讓CMOS 射頻前端晶片堆疊在一玻璃積體被動元件基板上，除了在一特定寬頻範圍內具有高線性度與低雜訊指數之特性，還有模組尺寸微型化之優點。最後，本論文提出兩款CMOS 頻率鍵移射頻接收機，因採用注入鎖定技術而免除本地振盪源所依賴之鎖相迴路，故具有架構複雜度低之優點，再配合自我振盪混波器或除二頻器加次諧波混波器等電路，能使接收機在很低的功耗下具有優異之靈敏度。

Future wireless communication systems will be more focused on having high data rates or low-power consumption. This dissertation aims to investigate and implement wideband receiver radio-frequency (RF) front-end integrated circuits (ICs) and high energy-efficient RF receivers. Based on this aim, the dissertation includes three major topics. First of all, two novel wideband CMOS common-gate low-noise amplifiers (LNAs) are proposed. They use dual-feedback schemes to simultaneously achieve input and noise impedance matching. Moreover, using an on-chip transformer in these LNAs significantly enhances the bandwidth of the associated gain factors. Next, a flip-chip RF front-end module package which stacks a CMOS RF front-end IC above a glass integrated passive device substrate is studied. This package has not only high linearity and low noise figure over a specific wide frequency range, but also a miniature size. Finally, two frequency shift-keying (FSK) receivers with low
complexity are presented. These receivers utilize an injection-locking technique to remove the widely used phase-locked loop in a local oscillator. Furthermore, combined with a self-oscillating mixer or a divide-by-2 frequency divider plus a subharmonic mixer, the presented FSK receivers achieve superior sensitivity with very low power consumption.

1 Introduction 1
1.1 Research Motivation 1
1.2 Multi-Band/Multi-Standard Receiver Architectures 3
1.2.1 Front-End Receiver with Multi-Path RF Input 3
1.2.2 Front-End Receiver with Single-Path RF Input 5
1.3 Energy-Efficient Receiver Using Injection Locking Scheme 7
1.4 Dissertation Objectives and Organization 12
2 CMOS Wideband Common-Gate Low-Noise Amplifiers 14
2.1 Introduction 14
2.2 Differential CG LNA with a Gm-Boosted Feedback 15
2.3 Differential CG LNA with a Gm-Boosted and Shunt-Series Dual Feedback 17
2.3.1 Input Impedance Analysis 17
2.3.2 Noise Analysis 18
2.3.3 Voltage Gain and 3-dB Gain Bandwidth Analysis 19
2.4 Differential CG LNA with a Gm-Boosted and Shunt–Shunt Dual Feedback 20
2.4.1 Input Impedance Analysis 20
2.4.2 Noise Analysis 22
2.4.3 Voltage Gain and 3-dB Gain Bandwidth Analysis 23
2.5 Stability Condition and Design Guide 24
2.5.1 Stability 24
2.5.2 Design Guide 24
2.5.3 Comparison of |S11|, BWER, and NF 26
2.6 Circuit Implementation and Experimental Results 29
2.6.1 Circuit Design 29
2.6.2 Experimental Results 31
2.7 Summary 37
3 CMOS Wideband Receiver Front-End Stacked with Glass Integrated Passive Devices 38
3.1 Introduction 38
3.2 Wideband RFE Architectures 40
3.3 Analysis and Design of Wideband RFE 43
3.3.1 Wideband Low-Voltage LNA with GIPD Inductors 43
3.3.2 Wideband CG Down-Conversion Mixer with a PD Linearizer 46
3.3.3 Bifilar Transformer-Based GIPD Balun 51
3.3.4 Stacked RFE with Consideration of Coupling Effects 53
3.4 Experimental Results 55
3.5 Summary 61
4 Low-Power FSK Receivers Using Injection Locking Technique 62
4.1 Introduction 62
4.2 Analysis and Design of ILO-Based FSK Receiver 63
4.2.1 Receiver Architecture 63
4.2.2 Sub-mW LNA 65
4.2.3 Self-Oscillating Mixer 66
4.2.4 Trifilar Transformer-Based Splitter 68
4.2.5 Circuit Design 68
4.2.6 Experimental Results 69
4.3 Analysis and Design of ILFD-Based FSK Receiver 73
4.3.1 Receiver Architecture 74
4.3.2 Cascoded LNA 75
4.3.3 Single-Balanced SHM 75
4.3.4 Injection-Locked ILFD 77
4.3.5 Experimental Results 77
4.4 Summary 80
5 Conclusions 82
Bibliography 84
Vita 98

[1] N. Himayat, S. Talwar, A. Rao, and R. Soni, “Interference management for 4G cellular standards [WiMax/LTE update],” IEEE Commun. Mag., vol. 48, no. 8, pp. 86–92, Aug. 2010.
[2] H. Darabi, A. Mirzaei, and M. Mikhemar, “Highly integrated and tunable RF front ends for reconfigurable multiband transceivers: A tutorial,” IEEE Trans. Circuits Syst. I: Reg. Papers, vol. 58, no. 9, pp. 2038–2050, Sep. 2011.
[3] M. Mikhemar, H. Darabi, and A. A. Abidi, “A multiband RF antenna duplexer on CMOS-design and performance,” IEEE J. Solid-State Circuits, vol. 48, no. 9, pp. 2067–2077, Sep. 2013.
[4] J. Mitola, “The software radio architecture,” IEEE Commun. Mag., vol. 33, no. 5, pp. 26–38, May 1995.
[5] A. A. Kountouris, C. Moy, L. Rambaud, and P. Le Corre, “A reconfigurable radio case study: A software based multistandard transceiver for UMTS, GSM, EDGE and Bluetooth,” in Proc. IEEE Veh. Technol. Conf., Atlantic City, NJ, Oct. 2001, pp. 1196–1200.
[6] A. A. Abidi, “The path to the software-defined radio receiver,” IEEE J. Solid-State Circuits, vol. 42, no. 5, pp. 954–966, May 2007.
[7] R. Bagheri, A. Mirzaei, S. Chehrazi, M. E. Heidari, M. Lee, M. S. Mikhemar, W. K. Tang, and A. A. Abidi, “An 800-MHz–6-GHz software-defined wireless receiver in 90-nm CMOS,” IEEE J. Solid-State Circuits, vol. 41, no. 12, pp. 2860–2876, Dec. 2006.
[8] E. Buracchini, “The software radio concept,” IEEE Commun. Mag., vol. 38, no. 9, pp. 138–143, Sep. 2000.
[9] Z. Ru, N. A Moseley, E. Klumperink, and B. Nauta, “Digitally enhanced software-defined radio receiver robust to out-of-band interference,” IEEE J. Solid-State Circuits, vol. 44, no. 12, pp. 3359–3375, Dec. 2009.
[10] Z. Ru, E. A. M. Klumperink, and B. Nauta, “A discrete mixing receiver architecture with wideband harmonic rejection,” in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb. 2008, pp. 322–616.
[11] Z. Ru, E. A. M. Klumperink, G. J. M. Wienk, and B. Nauta, “A software-defined radio receiver architecture robust to out-of-band interference,” in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb. 2009, pp. 230–231.
[12] J. Borremans, G. Mandal, V. Giannini, B. Debaillie, M. Ingels, T. Sano, B. Verbruggen, and J. Craninckx, “A 40 nm CMOS 0.4–6 GHz receiver resilient to out-of-band blockers,” IEEE J. Solid-State Circuits, vol. 46, no. 7, pp. 1659–1671, Jul. 2011.
[13] R. Chan and H. Hashemi, “A 0.5-to-3 GHz software-defined radio receiver using sample domain signal processing,” in IEEE Radio Freq. Integr. Circuits Symp., Jun. 2013, pp. 315–318.
[14] A. Mirzaei, X. Chen, A. Yazdi, J. Chiu, J. Leete, and H. Darabi, “A frequency translation technique for SAW-less 3G receivers,” in IEEE Symp. VLSI Circuits Dig. Tech. Papers, Jun. 2009, pp. 280–281.
[15] G. P. Fettweis and E. Zimmermann, “ICT energy consumption – trends and challenges,” in Proc. 11th Int. Wireless Personal Multimedia Communications Symp., Lapland, Finland, Sep. 2008.
[16] S. K. Hampel, O. Schmitz, M. Tiebout, K. Mertens, and I. Rolfes, “9-GHz wideband CMOS RX and TX front-ends for universal radio applications,” IEEE Trans. Microw. Theory Tech., vol. 60, no. 4, pp. 1105–1116, Apr. 2012.
[17] R. R. Harrison, “A low-power, low-noise CMOS amplifier for neural recording applications,” IEEE J. Solid-State Circuits, vol. 38, pp. 958–965, Jun. 2003.
[18] M. J. Steyaert, W. M. C. Sansen, and C. Zhongyuan, “A micropower low-noise monolithic instrumentation amplifier for medical purposes,” IEEE J. Solid-State Circuits, vol. 22, no. 6, pp. 1163–1168, Dec. 1987.
[19] J. Craninckx and M. S. J. Steyaert, “A 1.8-GHz CMOS low-phase-noise voltage-controlled oscillator with prescaler,” IEEE J. Solid-State Circuits, vol. 30, no. 12, pp. 1474–1482, Dec. 1995.
[20] S. L. Chen, H. Y. Lee, C. A. Chen, H. Y. Huang, and C. H. Lou, “Wireless body sensor network with adaptive low-power design for biometrics and healthcare applications,” IEEE Trans. Syst. J., vol. 3, no. 4, pp. 398–409, Dec. 2009.
[21] M. Danesh and J. R. Long, “An autonomous wireless sensor node incorporating an solar cell antenna for energy harvesting,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 12, pp. 3546–3555, Dec. 2011.
[22] B. W. Cook, A. Berny, A. Molnar, S. Lanzisera, and K. S. J. Pister, “Low-power 2.4-GHz transceiver with passive RX front-end and 400-mV supply,” IEEE J. Solid-State Circuits, vol. 41, no. 12, pp. 2757–2766, Dec. 2006.
[23] B. Otis, Y. H. Chee, and J. Rabaey, “A 400 μW-RX, 1.6 mW-TX super-regenerative transceiver for wireless sensor networks,” in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb. 2005, pp. 396–397.
[24] A. Molnar, B. Lu, S. Lanzisera, B. W. Cook, and K. S. J. Pister, “An ultra-low power 900 MHz RF transceiver for wireless sensor networks,” in Proc. IEEE Custom Integr. Circuits Conf., San Jose, CA, Oct. 2004, pp. 401–404.
[25] A. Fehske, G. Fettweis, J.Malmodin, and G. Biczok, “The global footprint of mobile communications: The ecological and economic perspective,” IEEE Commun. Mag., vol. 49, no. 8, pp. 55–62, Aug. 2011.
[26] F. Richter, A. J. Fehske, P. Marsch, and G. P. Fettweis, “Traffic demand and energy efficiency in heterogeneous cellular mobile radio networks,” in Proc. IEEE Veh. Technol. Conf., Taipei, Taiwan, May 2010, pp. 1–6.
[27] C. Khirallah, D. Vukobratovic, J. S. Thompson, “on energy efficiency of joint transmission coordinated multi-point in LTE-advanced,” in Proc. Int. ITG - IEEE Workshop on Smart Antennas, Dresden, Germany, Mar. 2012, pp. 54–61.
[28] E. Martens, V. Srinivasan, V. Wang, and S. Ramaswamy, “RF-to-baseband digitization in 40 nm CMOS with RF bandpass ΔΣ modulator and polyphase decimation filter,” IEEE J. Solid-State Circuits, vol. 47, no. 4, pp. 990–1002, Apr. 2012.
[29] K. L. Fong, “Dual-band high-linearity variable gain low-noise amplifiers for wireless applications”, in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb. 1999, pp. 224–225.
[30] H. Hashemi and A. Hajimiri, “Concurrent multiband low-noise amplifiers-theory, design, and applications,” IEEE Trans. Microw. Theory Tech., vol. 50, no. 1, pp. 288–301, Jan. 2002.
[31] S. Wu and B. Razavi, “A 900 MHz/1.8 GHz CMOS receiver for dual band applications,” in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb. 1998, pp. 124–125.
[32] B. Bakkaloglu, P. Fontaine, A. N. Mohieldin, S. Peng, and F. Dulger, A 1.5-V multi-mode quad-band RF RX for GSM/EDGE/CDMA2K in 90-nm digital CMOS process,” IEEE J. Solid-State Circuits, vol. 41, no. 5, pp. 1149–1159, May 2006.
[33] J. Tham, M. A. Margarit, B. Pregardier, C. D. Hull, R. Magoon, and F. Carr, “A 2.7-V 900-MHz/1.9-GHz dual-band transceiver IC for digital wireless communication,” IEEE J. Solid-State Circuits, vol. 34, no. 3, pp. 286–291, Mar. 1999.
[34] S. F. Chang, W. L. Chen, S. C. Chang, C. K. Tu, C. L. Wei, C. H. Chien, C. H. Tsai, J. Chen, and A. Chen, “A dual-band RF transceiver for multistandard WLAN applications,” IEEE Trans. Microw. Theory Tech., vol. 53, no. 3, pp. 1048–1055, Mar. 2005.
[35] J. Ryynanen, K. Kivekas, J. Jussila, A. Parssinen, and K. A. I. Halonen, “A dual-band RF front-end for WCDMA and GSM applications,” IEEE J. Solid-State Circuits, vol. 36, no. 8, pp. 1198–1204, Aug. 2001.
[36] H. Yoshida, S. Otaka, T. Kato, and H. Tsurumi, “A software defined radio receiver using the direct conversion principle: Implementation and evaluation,” in IEEE Int. Pers., Indoor, Mobile Radio Commun. Symp., vol. 2, pp. 1044–1048, Sep. 2000.
[37] A. A. Abidi, “Evolution of a software-defined radio receiver’s RF front-end,” in IEEE Radio Freq. Integr. Circuits Symp., Jun. 2006, pp. 27–30.
[38] H. Tsurumi and Y. Suzuki, “Broadband RF stage architecture for soft-ware-defined radio in handheld terminal applications,” IEEE Commun. Mag., vol. 37, no. 2, pp. 90–95, Feb. 1999.
[39] G. Cafaro, T. Gradishar, J. Heck, S. Machan, G. Nagaraj, S. Olson, R. Salvi, B. Stengel, and B. Ziemer, “A 100 MHz – 2.5 GHz direct conversion CMOS transceiver for SDR applications”, in IEEE Radio Freq. Integr. Circuits Symp., Jun. 2007, pp. 189–192.
[40] J. Craninckx, M. Liu, D. Hauspie, V. Giannini, T. Kim, J. Lee, M. Libois, B. Debaillie, C. Soens, M. ingels, A. Baschirotto, J. Van Driessche, L. Van der Perrer, and P. Vanbekbergen, “A fully reconfigurable software-defined radio transceiver in 0.13-μm CMOS,” in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, San Francisco, CA, Feb. 2007, pp. 346–347.
[41] V. Giannini, J. Craninckx, S. D’Amico, and A. Baschirotto, “Flexible baseband analog circuits for software-defined radio front-ends,” IEEE J. Solid-State Circuits, vol. 42, no. 7, pp. 1501–1512, Jul. 2007.
[42] N. Poobuapheun, W. Chen, Z. Boos, and A. M. Niknejad, “An inductorless high dynamic range 0.3–2.6 GHz receiver CMOS front-end,” in IEEE Radio Freq. Integr. Circuits Symp., Jun. 2009, pp. 397–390.
[43] M. Cao, B. Chi, C. Zhang, and Z. Wang, “A 1.2V 0.1–3GHz software-defined radio receiver front-end in 130nm CMOS,” in IEEE Radio Freq. Integr. Circuits Symp., Jun. 2011, pp. 1–4.
[44] A. Bourdoux, J. Craninckx, A. Dejonghe, and L. V. der Perre, “Receiver architectures for software-defined radios in mobile terminals: The path to cognitive radios,” in Proc. IEEE Radio and Wireless Symp., Long Beach, CA, Jan. 2007, pp. 535–538.
[45] L. Sheng, J. C. Jensen, and L. E. Larson, “A wide-bandwidth Si/SiGe HBT direct conversion sub-harmonic mixer/downconverter,” IEEE J. Solid-State Circuits, vol. 35, no. 9, pp. 1329–1337, Sep. 2000.
[46] B. Matinpour, S. Chakraborty, and J. Laskar, “Novel dc-offset cancellation techniques for even-harmonic direct conversion receivers,” IEEE Trans. Microw. Theory Tech., vol. 48, no. 12, pp. 2554–2559, Dec. 2000.
[47] M. F. Huan, C. J. Kuo, and S.-Y. Lee, “A 5.25 GHz CMOS folded-cascode even harmonic mixer for low voltage applications,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 2, pp. 660–669, Feb. 2006.
[48] S. Heand and C. E. Saavedra,“An ultra-low-voltage and low-power subharmonic downconverter mixer,” IEEE Trans. Microw. Theory Techn., vol. 60, no. 2, pp. 311–317, Feb. 2012.
[49] B. Bakkaloglu and P. A. Fontaine, “Multi-mode, multi-band RF transceiver circuits for mobile terminals in deep-submicron CMOS processes,” in IEEE Radio Freq. lntegr. Circuits Symp., Jun. 2005, pp. 483–486.
[50] D. Shaeffer and T. Lee, “A 1.5-V, 1.5-GHz CMOS low noise amplifier,” IEEE J. Solid-Stare Circuits, vol. 32, no. 5, pp. 745–59, May 1997.
[51] T.-K. Nguyen, C.-H. Kim, M.-S. Yang, and S.-G. Lee, “CMOS low-noise amplifier design optimization techniques,” IEEE Trans. Microw. Theory Tech., vol. 52, no. 5, pp. 1433–1442, May 2004.
[52] L. Belostotski and J. W. Haslett, “Noise figure optimization of inductively degenerated CMOS LNAs with integrated gate inductors,” IEEE Trans. Circuits Syst. I: Reg. Papers, vol. 53, no. 7, pp. 1409–1422, Jul. 2006.
[53] A. L. L. Pun, T. Yeung, J. Lau, F. J. R. Clement, and D. Su, “Substrate noise coupling through planar spiral inductor,” IEEE J. Solid-State Circuits, vol. 33, no. 6, pp. 877–884, June 1998
[54] C. P. Yue and S. S. Wong, “On-chip spiral inductors with patterned ground shields for Si-based RF IC’s,” IEEE J. Solid-State Circuits, vol. 33, no. 5, pp. 743–752, May 1998.
[55] F. Tzeng, A. Jahanian, and P. Heydari, “A multiband inductor-reuse CMOS low-noise amplifier,” IEEE Trans. Circuits Syst. II, Expr. Briefs, vol. 55, no. 3, pp. 209–213, Mar. 2008.
[56] Z. Li, R. Quintal, and K. O, “A dual-band CMOS front-end with two gain modes for wireless LAN applications,” IEEE J. Solid-State Circuits, vol. 39, no. 11, pp. 2069–2073, Nov. 2004.
[57] B. G. Perumana, J.-H. C. Zhan, S. S. Taylor, B. R. Carlton, and J. Laskar, “Resistive-feedback CMOS low-noise amplifiers for multiband applications,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 5, pp. 1218–1225, May 2008.
[58] P.-I. Mak and R. P. Martins, “A 0.46-mm2 4-dB NF unified receiver frontend for full-band mobile TV in 65-nm,” IEEE J. Solid-State Circuits, vol. 46, no. 9, pp. 1970–1984, Sep. 2011.
[59] A. Goel, B. Analui, and H. Hashemi, “A 130-nm CMOS 100-Hz–6-GHz reconfigurable vector signal analyzer and software-defined receiver,” IEEE Trans. Microw. Theory Tech., vol. 60, no. 5, pp. 1375–1389, May 2012.
[60] A. Liscidini, M. Brandolini, D. Sanzogni, and R. Castello, “A 0.13μm CMOS front-end, for DCS1800/UMTS/802.11b-g with multiband positive feedback low-noise amplifier,” IEEE J. Solid-State Circuits, vol. 41, no. 4, pp. 981–989, Apr. 2006.
[61] J. Park, S. N. Kim, Y. S. Roh, and C. Yoo, “A direct-conversion CMOS RF receiver reconfigurable from 2 to 6 GHz,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 9, pp. 2326–2333, Sep. 2010.
[62] X. Yu and N. M. Neihart, “Analysis and design of a reconfigurable multimode low-noise amplifier utilizing a multitap transformer,” IEEE Trans. Microw. Theory Tech., vol. 61, no. 3, pp. 1236–1246, Mar. 2013.
[63] M. El-Nozahi, E. Sanchez-Sinencio, and K. Entesari, “A CMOS lownoise amplifier with reconfigurable input matching network,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 5, pp. 1054–1062, May 2009.
[64] N. M. Neihart, J. Brown, and X. Yu, “A dual-band 2.45/6 GHZ CMOS LNA utilizing a dual-resonant transformer-based matching network,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 59, no. 8, pp. 1743–1751, Aug. 2012.
[65] C. Fu, C. Ko, C. Kuo, and Y. Juang, “A 2.4–5.4-GHz wide tuningrange CMOS reconfigurable low-noise amplifier,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 12, pp. 2754–2763, 2008.
[66] M. T. Reiha and J. R. Long, “A 1.2 V reactive-feedback 3.1–10.6-GHz low-noise amplifier in 0.13μm CMOS,” IEEE J. Solid-State Circuits, vol. 42, no. 5, pp. 1023–1033, May 2007.
[67] H. Zhang, X. Fan, and E. S. Sinencio, “A low-power, linearized, ultra-wideband LNA design technique,” IEEE J. Solid-State Circuits, vol. 44, no. 2, pp. 320–330, Feb. 2009.
[68] J.-F. Chang and Y.-S. Lin, “0.99 mW 3–10 GHz common-gate CMOS UWB LNA using T-match input network and self-body-bias technique,” Electron. Lett., vol. 47, no. 11, pp. 658–659, May 2011.
[69] T. Chang, J. Chen, L. A. Rigge, and J. Lin, “ESD-protected wideband CMOS LNAs using modified resistive feedback techniques with chip-on-board packaging,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 8, pp. 1817–1826, Aug. 2008.
[70] W. Zhou, S. Shekhar, S. Embabi, J. P. de Gyvez, D. Allstot, and E. Sanchez-Sinencio, “A capacitor cross-coupled common-gate low noise amplifier,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 52, no. 12, pp. 875–879, Dec. 2005.
[71] S. C. Blaakmeer, E. A. M. Klumperink, D. M. W. Leenaerts, and B. Nauta, “An inductorless wideband balun-LNA in 65 nm CMOS with balanced output,” in Proc. 33rd Eur. Solid-State Circuits Conf., Munich, Germany, Sep. 2007, pp. 364–367.
[72] C.-F. Liao and S.-I. Liu, “A broadband noise-canceling CMOS LNA for 3.1–10.6-GHz UWB receivers,” IEEE J. Solid-State Circuits, vol. 42, no. 2, pp. 329–339, Feb. 2007.
[73] A. Vallese, A. Bevilacqua, C. Sandner, M. Tiebout, A. Gerosa, and A. Neviani, “Analysis and design of an integrated notch filter for the rejection of interference in UWB systems,” IEEE J. Solid-State Circuits, vol. 44, no. 2, pp. 331–343, Feb. 2009.
[74] L. Jui-Yi and C. Hwann-Kaeo, “Power-constrained third-order active notch filter applied in IR-LNA for UWB standards,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 58, no. 1, pp. 11–15, Jan. 2011.
[75] S. C. Blaakmeer, E. A. M. Klumperink, D. M. W. Leenaerts, and B. Nauta, “Wideband balun-LNA with simultaneous output balancing, noise-canceling and distortion-canceling,” IEEE J. Solid-State Circuits, vol. 43, no. 6, pp. 1341–1350, Jun. 2008.
[76] W.-H. Chen, G. Liu, B. Zdravko, and A. Niknejad, “A highly linear broadband CMOS LNA employing noise and distortion cancellation,” IEEE J. Solid-State Circuits, vol. 43, no. 5, pp. 1164–1176, May 2008.
[77] V. Giannini, P. Nuzzo, C. Soens, K. Vengattaramane, J. Ryckaert, M. Goffioul, B. Debaillie, J. Borremans, J. Van Driessche, J. Craninckx, and M. Ingels, “A 2-mm2 0.1–5 GHz software-defined radio receiver in 45-nm digital CMOS,” IEEE J. Solid-State Circuits, vol. 44, no. 12, pp. 3486–3498, Dec. 2009.
[78] Z. Ru, E. Klumperink C. Saavedra and B. Nauta “A tunable 300800MHz RF sampling receiver achieving 60dB harmonic rejection and 0.8dB minimum NF in 65nm CMOS” in IEEE Radio Freq. Integr. Circuits Symp., Jun. 2009, pp. 21–24.
[79] K. L. Lange, J. Papapolymerou, C. L. Goldsmith, A. Malczewski, and J. Kleber, “A reconfigurable double-stub tuner using MEMS device,” in IEEE MTT-S Int. Microwave Symp. Dig., vol. 1, May 2001, pp. 337–340.
[80] G. K. Fedder and T. Mukherjee, “Tunable RF and analog circuits using on-chip MEMS passive components,” in IEEE Int. Solid-State Circuits Conf. Dig. Tech. Papers, Feb. 2005, pp. 390–391.
[81] M. Ranjan and L. E. Larson, “Distortion analysis of ultra-wideband OFDM receiver front-ends,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 12, pp. 4422–4431, Dec. 2006.
[82] Y. Kim, Y. Kim, and S. Lee, “Linearized mixer using predistortion technique,” IEEE Microw. Wireless Compon. Lett., vol. 12, no. 6, pp. 204–205, Jun. 2002.
[83] K. K. M. Cheng and C. F. Au-Yeung, “Novel difference-frequency dual-signal injection method for CMOS mixer linearization,” IEEE Microw. Wireless Compon. Lett, vol. 14, no. 7, pp. 358–360, Jul. 2004.
[84] K.-H. Liang, C.-H. Lin, H.-Y. Chang, and Y.-J. Chan, “A new linearization technique for CMOS RF mixer using third-order transconductance cancellation,” IEEE Microw.Wireless Compon. Lett., vol. 18, no. 5, pp. 350–352, May 2008.
[85] K. Dufrene, Z. Boos, and R. Weigel, “Digital adaptive IIP2 calibration scheme for CMOS downconversion mixers,” IEEE J. Solid-State Circuits, vol. 43, no. 11, pp. 2434–2445, Nov. 2008.
[86] M. B. Vahidfar and O. Shoaei, “A high IIP2 mixer enhanced by a new calibration technique for zero-if receivers,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 55, no. 3, pp. 219–223, Mar. 2008.
[87] W. Kim, S.-G. Yang, J. Yu, H. Shin, W. Choo, and B.-H. Park, “A direct conversion receiver with an IP2 calibrator for CDMA/PCS/GPS/AMPS applications,” IEEE J. Solid-State Circuits, vol. 41, no. 7, pp. 1535–1541, Jul. 2006.
[88] R. Adler, “A study of locking phenomena in oscillators,” Proc. IEEE, vol. 61, pp. 1380–1385, Oct. 1973.
[89] B. Razavi, “A study of injection locking and pulling in oscillators,” IEEE J. Solid-State Circuits, vol. 39, no. 9, pp. 1415–1424, Sept. 2004.
[90] C.-J. Li, F.-K.Wang, T.-S. Horng, and K.-C. Peng, “A novel RF sensing circuit using injection locking and frequency demodulation for cognitive radio applications,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 12, pp. 3143–3152, Dec. 2009.
[91] E. Main and D. Coffing, “An FSK demodulator for Bluetooth applications having no external components,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 49, no. 6, pp. 373–378, Jun. 2002.
[92] F. Ramírez, V. Araña, andA. Suárez, “Frequency demodulator using an injection-locked oscillator: Analysis and design,” IEEE Microw. Wireless Compon. Lett., vol. 18, no. 1, pp. 43–45, Jan. 2008.
[93] J. M. Lopez-Villegas, N. Vidal, and J. G. Macias-Montero, “FSK coherent demodulation using second-harmonic injection locked oscillator,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 9, pp. 578–580, Sep. 2009.
[94] J. Bae, L. Yan, and H.-J. Yoo, “A low energy injection-locked FSK transceiver with frequency-to-amplitude conversion for body sensor applications,” IEEE J. Solid-State Circuits, vol. 46, no. 4, pp. 928–937, Apr. 2011.
[95] K. Kawasaki, Y. Akiyama, K. Komori, M. Uno, H. Takeuchi, T. Itagaki, Y. Hino, Y. Kawasaki, K. Ito, and A. Hajimiri, “A millimeter-wave intra-connect solution,” IEEE J. Solid-State Circuits, vol. 45, no. 12, pp. 2655–2666, Dec. 2010.
[96] C.-S. Wang, K.-D. Chu, and C.-K. Wang, “A 0.13μm CMOS 2.5Gb/s FSK demodulator using injection-locked technique,” in IEEE Radio Freq. Integr. Circuits Symp., Jun. 2009, pp. 563–566.
[97] V. Giannini, P. Nuzzo, C. Soens, K. Vengattaramane, M. Steyaert, J. Ryckaert, M. Goffioul, B. Debaillie, J. Van Driessche, J. Craninckx, and M. Ingels, “A 2mm2 0.1-to-5GHz SDR receiver in 45nm digital CMOS,” IEEE J. Solid-State Circuits, vol. 44, no. 12, pp. 3486–3498, Dec. 2009.
[98] R. van de Beek, J. Bergervoet, H. Kundur, D. Leenaerts, and G. van der Weide, “A 0.6-to-10 GHz receiver front-end in 45 nm CMOS,” in IEEE Int. Solid-State Circuits Conf. Tech. Dig. Papers, Feb. 2008, pp. 128–129.
[99] R.-M. Weng, C.-Y. Liu, and Po-Cheng Lin, “A low-power full-band low-noise amplifier for ultra-wideband receivers,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 8, pp. 2077–2083, Aug. 2010.
[100] B. Park, S. Choi, and S. Hong, “A low-noise amplifier with tunable interference rejection for 3.1- to 10.6-GHz UWB systems,” IEEE Microw. Wireless Compon. Lett., vol. 20, no. 1, pp.40–42, Jan. 2010.
[101] K.-H. Chen, J.-H. Lu, B.-J. Chen, and S.-I. Liu, “An ultra-wide-band 0.4–10-GHz LNA in 0.18-μm CMOS,” IEEE Trans. Circuits Syst. II, Exp. Briefs., vol. 54, no. 3, pp. 217–221, Mar. 2007.
[102] Y.-T Lo and J.-F. Kiang, “Design of wideband LNAs using parallel-to-series resonant matching network between common-gate and common-source stages,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 9, pp. 2285–2294, Sep. 2011.
[103] D. Pepe and D. Zito, “22.7-dB gain 19.7-dBm ICP1dB UWB CMOS LNA,” IEEE Trans. Circuits Syst. II, Exp. Briefs., vol. 56, no. 9, pp. 689–693, Sept. 2009.
[104] K.-H. Chen and S.-I. Liu “Inductorless wideband CMOS low-noise amplifiers using noise canceling technique” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 59, no. 2, pp.305–314, Feb. 2012.
[105] M. Khurram and S. M. R. Hasan “Series peaked noise matched gm-boosted 3.1–10.6 GHz CG CMOS differential LNA for UWB WiMedia,” Electron. Lett., vol. 47, no. 24, pp.1346–1348, Nov. 2011.
[106] S. Shekhar, J. S. Walling, and D. J. Allstot, “Bandwidth extension techniques for CMOS amplifiers,” IEEE J. Solid-State Circuits, vol. 41, no. 11, pp. 2424–2439, Nov. 2006.
[107] A. Liscidini, C. Ghezzi, E. Depaoli, G. Albasini, I. Bietti, and R. Castello, “Common gate transformer feedback LNA in high IIP3 current mode RF CMOS front-end,” in Proc. IEEE Custom integr. Circuits Conf., San Jose, CA, Sep. 2006, pp. 25–28.
[108] S. Woo, W. Kim, C. Lee, K. Lim, and J. Laskar, “A wideband low-power CMOS LNA with positive–negative feedback for noise, gain, and linearity optimization,” IEEE Trans. Microw. Theory Tech., vol. 60, no. 10, pp. 3169–3178, Oct. 2012.
[109] A. J. Scholten, L. F. Tiemeijer, R. Van Langevelde, R. J. Havens, A. T. A. Zegers-van Duijnhoven, and V. C. Venezia, “Noise modeling for RF CMOS circuit simulation,” IEEE Trans. Electron Devices, vol. 50, no. 3, pp. 618–632, Mar. 2003.
[110] S. Galal and B. Razavi, “40-Gb/s amplifier and ESD protection circuit in 0.18-μm CMOS technology,” IEEE J. Solid-State Circuits, vol. 41, no. 11, pp. 2389–2396, Dec. 2004.
[111] A. Liscidini, G. Martini, D. Mastantuono, and R. Castello, “Analysis and design of configurable LNAs in feedback common-gate topologies,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 55, no. 8, pp. 733–737, Aug. 2008.
[112] W. Zhuo, X. Li, S. H. K. Embabi, J. Pineda de Gyvez, D. J. Allstot, E. Sanchez-Sinencio, “A capacitor cross-coupled common-gate low-noise amplifier,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 52, no. 12, pp. 875–879, Dec. 2005.
[113] B. Godara and A. Fabre, “A highly compact active wideband balun with impedance transformation in SiGe BiCMOS,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 1, pp. 22–30, Jan. 2008.
[114] D. Manstretta, M. Bradolini, and F. Svetlo, “Second-order intermodulation mechanisms in CMOS downconverters,” IEEE J. Solid-State Circuits, vol. 38, no. 3, pp.394–406, Mar. 2003.
[115] H.-C. Chen, T.-Wang, H.-W. Chiu, T.-H. Kao, and S.-S. Lu, “0.5-V 5.6-GHz CMOS receiver subsystem,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 2, pp. 329–335, Feb. 2009.
[116] Y. Wang, H. Wang, C. Hull, and S. Ravid, “A transformer-based broadband I/O matching-balun-T/R switch front-end combo scheme in standard CMOS,” in Proc. IEEE Custom Integr. Circuits Conf., San Jose, CA, Sep. 2011, pp. 1–4.
[117] N. Checka, D. D. Wentzloff, A. Chandrakasan, and R. Reif, “The effect of substrate noise on VCO performance,” in IEEE Radio Freq. Integr. Circuits Symp., Jun. 2005, pp. 523–526.
[118] S.-F. Chao, J.-J. Kuo, C.-L. Lin, M.-D. Tsai, and H. Wang, “A dc-11.5 GHz low-power, wideband amplifier using splitting-load inductive peaking technique,” IEEE Microw. Wireless Compon. Lett, vol. 18, no. 7, pp. 482–484, Jul. 2008.
[119] A. Amer, E. Hegazi, and H. F. Ragaie, “A 90-nm wideband merged CMOS LNA and Mixer exploiting noise cancellation,” IEEE J. Solid-State Circuits, vol. 42, no. 2, pp. 323–328, Feb. 2007.
[120] M. El-Nozahi, E. Sanchez-Sinencio, and K. Entesari, “A millimeter-wave (23–32GHz) wideband BiCMOS low-noise amplifier,” IEEE J. Solid-State Circuits, vol. 45, no. 2, pp. 289–299, Feb. 2010.
[121] H. Darabi and J. Chiu, “A noise cancellation technique in active RF-CMOS mixers,” IEEE J. Solid-State Circuits, vol. 40, no. 12, pp. 2628–2632, Dec. 2005.
[122] X. Sun , O. Dupuis , D. Linten , G. Carchon , P. Soussan , S. Decoutere , W. De Raedt and E. Beyne “High-Q above-IC inductors using thin-film wafer-level packaging technology demonstrated on 90-nm RF-CMOS 5-GHz VCO and 24-GHz LNA,” IEEE Trans. Compon. Packag. Manuf. Tech., vol. 29, no. 4, pp. 810–817, Nov. 2006.
[123] F.-Y. Han, K.-C. Lu, T.-S. Horng, J Lin, H.-H. Cheng, C.-T. Chiu, and C.-P. Hung, “Packaging effects on the figure of merit of a CMOS cascode low-noise amplifier: flip-chip versus wire-bond,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2009, pp. 601–604.
[124] S. Lee, J. Bergervoet, K. S. Harish, D. Leenaerts, R. Roovers, R. van de Beek, and G. van der Weide, “A broadband receive chain in 65nm CMOS,” in IEEE Int. Solid-State Circuits Conf. Tech. Dig. Papers, Feb. 2007, pp. 418–612.
[125] R. Bagheri, A. Mirzaei. S. Chehrazi, M. Heidari, M. Lee, M. Mikhemar, W. Tang, and A. Abidi, “An 800MHz to 5GHz software-defined radio receiver in 90nm CMOS,” in IEEE Int. Solid-State Circuits Conf. Tech. Dig. Papers, Feb. 2006, pp. 1932–1941.
[126] P. Simitsakis, Y. Papananos, and E.-S. Kytonaki, “Design of a low voltage-low power 3.1–10.6 GHz UWB RF front-end in a CMOS 65 nm technology,” IEEE Trans. Circuits Syst. II, Exp. Briefs., vol. 57, no. 11, pp. 833–837, Nov. 2010.
[127] X. Wang, J. Sturm, N. Yan, X. Tan, and H. Min, “0.6–3-GHz wideband receiver RF front-end with a feedforward noise and distortion cancellation resistive-feedback LNA,” IEEE Trans. Microw. Theory Tech., vol. 60, no. 2, pp. 387–392, Feb. 2012.
[128] Chen-Ming Li, Ming-Tsung Li, Kuang-Chi He, and Jenn-Hwan Tarng, “A low-power self-forward-body-bias CMOS LNA for 3–6.5 GHz UWB receiver,” IEEE Microw. Wireless Compon. Lett., vol. 20, no. 2, pp. 100–102, Feb. 2010.
[129] S. B.-T. Wang, A. M. Niknejad, and R. W. Brodersen, “A sub-mW 960-MHz ultra-wideband CMOS LNA ,” in IEEE Radio Freq. Integr. Circuits Symp., Jun. 2005, pp. 35–38.
[130] To-Po Wang, Chia-Chi Chang, Ren-Chieh Liu, Ming-Da Tsai, Kuo-Jung Sun, Ying-Tang Chang, Liang-Hung Lu, and Huei Wang, “A low-power oscillator mixer in 0.18-μm CMOS technology,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 1, pp. 88–95, Jan. 2006.
[131] C. P. Lee, A. Behzad, B. Marholev, V. Magoon, I. Bhatti, D. Li, S. Bothra, A. Afsahi, D. Ojo, R. Roufoogaran, T. Li, Y. Chang, K. R. Rao, S. Au, P. Seetharam, K. Carter, J. Rael, M. MacIntosh, B. Lee, M. Rofougaran, R. Rofougaran, A. Hadji-Abdolhamid, M. Nariman, S. Khorram, S. Anand, E. Chien, S. Wu, C. Barrett, L. Zhang, A. Zolfaghari, H. Darabi, A. Sarfaraz, B. Ibrahim, M. Gonikberg, M. Forbes, C. Fraser, L. Gutierrez, Y. Gonikberg, Y. M.
Hafizi, S. Mak, J. Castaneda, K. Kim, Liu Zhenhua Liu, S. Bouras, K. Chien, V. Chandrasekhar, P. Chang, E. Li, and Z. Zhao, “A multistandard, multiband SoC with integrated BT, FM, WLAN radios and integrated power amplifier,” in IEEE Int. Solid-State Circuits Conf. Dig., Feb. 2010, pp. 454–455.
[132] D. Weber, W. W. Si, S. Abdollahi-Alibeik, MeeLan Lee, R. Chang, H. Dogan, S. Luschas, and P. Husted, “A single-chip CMOS radio SoC for v2.1 Bluetooth applications,” in IEEE Int. Solid-State Circuits Conf. Dig., Feb. 2008, pp. 364–365.
[133] P. A. Dal Fabbro, T. Pittorino, C. Kuratli, R. Kvacek, M. Kucera, F. Giroud, S. Tanner, F. Chastellain, A. Casagrande, A. Descombes, V. Peiris, P.-A. Farine, and M. Kayal, “A 0.8V 2.4GHz 1Mb/s GFSK RF transceiver with on-chip dc-dc converter in a standard 0.18μm CMOS technology,” in Proc. IEEE Eur. Solid-State Circuits Conf., Seville, Spain, Sep. 2010, pp. 458–461.
[134] R.-F. Ye, T.-S. Horng, and J.-M. Wu, “Ultralow power injection-locked GFSK receiver for short-range wireless system,” IEEE Trans. Circuits Syst. II: Express Briefs, vol. 52, no. 11, pp. 706–710, Nov. 2012.
[135] R. J. Betancourt-Zamora, S. Verma, and T. H. Lee, “1-GHz and 2.8-GHz CMOS injection-locked ring oscillator prescalers,” in Proc. IEEE. VLSI Circuits Symp., Kyoto, Japan, Jun. 2001, pp. 47–50.
[136] A. V. Do, C. C. Boon, M. A. Do, K. S. Yeo, and A. Cabuk, “A weak-inversion low-power active mixer for 2.4 GHz ISM band applications,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 11, pp. 719–721, Nov. 2009.
[137] C.-P. Chang, J.-H. Chen, and Y.-H Wang, “A fully integrated 5 GHz low-voltage LNA using forward body bias technique,” IEEE Microw. Wireless Compon. Lett., vol. 19, no. 3, pp. 176–178, Mar. 2009.
[138] K. Yamamoto and M. Fujishima, “A 44-μW 4.3-GHz injection-Locked frequency divider with 2.3-GHz locking range,” IEEE J. Solid-State Circuits., vol. 40, no. 3, pp. 671–677, Mar. 2005.
[139] B. Koo, Y. Na, and S. Hong, “Integrated bias circuits of RF CMOS cascode power amplifier for linearity enhancement,” IEEE Trans. Microw. Theory Tech., vol. 60, no. 2, pp. 340–1225, Feb. 2012.
[140] H.-K. Chen, Y.-C. Lin, T.-Y. Chang, D.-C. Chang, Y.-Z. Juang, and S.-S. Lu, “CMOS wideband LNA design using integrated passive device,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 2009, pp. 673–676.
[141] Y.-C. Hsu, H.-K. Chiou, H.-K. Chen, T.-Y. Lin, D.-C. Chang, and Y.-Z. Juang, “Low phase noise and low power consumption VCOs using CMOS and IPD technologies,” IEEE Trans. Compon. Packag. Manuf. Tech., vol. 1, no. 5, pp. 673–680, May 2011.
[142] X. Li and M. Ismail, Multi-Standard CMOS Wireless Receivers: Analysis and Design, Kluwer Academic Publishers, Boston, MA, 2002.